The present invention relates in general to data communication, and in particular, to a system and method for permitting simultaneous communications between a plurality of drivers and a plurality of receivers using one transmission line.
Prior art circuitry does not permit simultaneous unidirectional data communications between two separate integrated circuits (xe2x80x9cchipsxe2x80x9d) through the same transmission line. In other words, when communicating signals between circuitry implemented in separate chips, it is required that for each separate transmission of a signal, there be a separate transmission line and corresponding connection circuitry, or that time division multiplexing be utilized in order that two separate signals be transmitted on the same transmission line between two chips.
Naturally, to implement time division multiplexing, additional complex circuitry is required. As a result, traditional system designs have had to settle for implementing separate transmission lines in order to support data communications in a simultaneous manner. However, it is generally desired when designing circuitry (for example, for computer systems) that the circuitry be simplified as much as possible. Therefore, it is desired to reduce the number of transmission lines between chips, along with their corresponding connection circuitry (e.g., driver, receiver, chip pins and signal pads).
Thus, there is a need in the art for a circuit design that allows for the simultaneous transmission of separate data signals on one transmission line.
The foregoing need is satisfied by the present invention, which implements encoding circuitry for receiving two digital signals, which encodes the two digital signals into one signal to be transmitted via a transmission path to a decoding circuitry, which decodes the one signal into the two digital signals. One of the digital signals is decoded and then utilized to decode the other digital signal. Encoding of the digital signals is performed through the use of a voltage divider circuit coupled to the transmission line. Decoding of the digital signals is performed by decoding the first digital signal by comparing the transmitted signal to a reference voltage, and then utilizing this decoded signal to decode the second digital signal by comparing the first decoded digital signal to the original signal.
In an alternative embodiment, the encoding stage may utilize additional circuitry for placing a portion of the circuitry into a tri-state mode for the transmission of only one of the digital signals via the single transmission line.
In yet another alternative embodiment of the present invention, the two digital signals may originate within two separate integrated circuit chips, and are then combined for transmission over the single transmission line.
In yet another alternative embodiment of the present invention, two separate sets of receiving and decoding circuits may be utilized to receive the single transmitted signal on the single transmission line and decode this signal into its constituent parts in separate integrated circuit chips.
The foregoing has outlined rather broadly the features and technical advantages of the present invention in order that the detailed description of the invention that follows may be better understood. Additional features and advantages of the invention will be described hereinafter which form the subject of the claims of the invention.